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Sheet目录3878

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2006 Microchip Technology Inc.

DS41159E-page 61

PIC18FXX8

5.3

Reading the Data EEPROM

Memory

To read a data memory location, the user must write the

address to the EEADR register, clear the EEPGD and

CFGS control bits (EECON1<7:6>) and then set

control bit RD (EECON1<0>). The data is available in

the very next instruction cycle of the EEDATA register;

therefore, it can be read by the next instruction.

EEDATA will hold this value until another read

operation or until it is written to by the user (during a

write operation).

EXAMPLE 5-1:

DATA EEPROM READ

5.4

Writing to the Data EEPROM

Memory

To write an EEPROM data location, the address must

first be written to the EEADR register and the data writ-

ten to the EEDATA register. Then, the sequence in

Example 5-2 must be followed to initiate the write cycle.

The write will not initiate if the above sequence is not

exactly followed (write 55h to EECON2, write 0AAh to

EECON2, then set WR bit) for each byte. It is strongly

recommended that interrupts be disabled during this

code segment.

Additionally, the WREN bit in EECON1 must be set to

enable writes. This mechanism prevents accidental

writes to data EEPROM due to unexpected code exe-

cution (i.e., runaway programs). The WREN bit should

be kept clear at all times, except when updating the

EEPROM. The WREN bit is not cleared by hardware.

After a write sequence has been initiated, clearing the

WREN bit will not affect the current write cycle. The WR

bit will be inhibited from being set unless the WREN bit

is set. The WREN bit must be set on a previous instruc-

tion. Both WR and WREN cannot be set with the same

instruction.

At the completion of the write cycle, the WR bit is

cleared in hardware and the EEPROM Write Complete

Interrupt Flag bit (EEIF) is set. The user may either

enable this interrupt or roll this bit. EEIF must be

cleared by software.

EXAMPLE 5-2:

DATA EEPROM WRITE

MOVLW

DATA_EE_ADDR

;

MOVWF

EEADR

;Data Memory Address

;to read

BCF

EECON1, EEPGD

;Point to DATA memory

BCS

EECON1, CFGS

;

BSF

EECON1, RD

;EEPROM Read

MOVF

EEDATA, W

;W = EEDATA

MOVLW

DATA_EE_ADDR

;

MOVWF

EEADR

; Data Memory Address to read

MOVLW

DATA_EE_DATA

;

MOVWF

EEDATA

; Data Memory Value to write

BCF

EECON1, EEPGD

; Point to DATA memory

BCF

EECON1, CFGS

; Access program FLASH or Data EEPROM memory

BSF

EECON1, WREN

; Enable writes

BCF

INTCON, GIE

; Disable interrupts

Required

MOVLW

55h

;

Sequence

MOVWF

EECON2

; Write 55h

MOVLW

0AAh

;

MOVWF

EECON2

; Write AAh

BSF

EECON1, WR

; Set WR bit to begin write

BSF

INTCON, GIE

; Enable interrupts

; user code execution

BCF

EECON1, WREN

; Disable writes on write complete (EEIF set)

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